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Metadados | Descrição | Idioma |
---|---|---|
Autor(es): dc.creator | Sánchez Gómez, Diego Felipe | - |
Autor(es): dc.creator | Muñoz Arboleda, Daniel Mauricio | - |
Autor(es): dc.creator | Llanos Quintero, Carlos Humberto | - |
Autor(es): dc.creator | Motta, José Maurício Santos Torres da | - |
Data de aceite: dc.date.accessioned | 2024-10-23T16:36:53Z | - |
Data de disponibilização: dc.date.available | 2024-10-23T16:36:53Z | - |
Data de envio: dc.date.issued | 2013-03-04 | - |
Data de envio: dc.date.issued | 2013-03-04 | - |
Data de envio: dc.date.issued | 2010 | - |
Fonte completa do material: dc.identifier | http://repositorio.unb.br/handle/10482/12309 | - |
Fonte: dc.identifier.uri | http://educapes.capes.gov.br/handle/capes/912873 | - |
Descrição: dc.description | Hardware acceleration in high performance computer systems has a particular interest for many engineering and scientific applications in which a large number of arithmetic operations and transcendental functions must be computed. In this paper a hardware architecture for computing direct kinematics of robot manipulators with 5 degrees of freedom (5 D.o.f ) using floatingpoint arithmetic is presented for 32, 43, and 64 bit-width representations and it is implemented in Field ProgrammableGate Arrays (FPGAs). The proposed architecture has been developed using several floating-point libraries for arithmetic and transcendental functions operators, allowing the designer to select (pre-synthesis) a suitable bit-width representation according to the accuracy and dynamic range, as well as the area, elapsed time and power consumption requirements of the application. Synthesis results demonstrate the effectiveness and high performance of the implemented cores on commercial FPGAs. Simulation results have been addressed in order to compute the Mean Square Error (MSE), using the Matlab as statistical estimator, validating the correct behavior of the implemented cores. Additionally, the processing time of the hardware architecture was compared with the same formulation implemented in software, using the PowerPC (FPGA embedded processor), demonstrating that the hardware architecture speeds-up by factor of 1298 the software implementation. | - |
Formato: dc.format | application/pdf | - |
Publicador: dc.publisher | Hindawi Publishing Corporation | - |
Direitos: dc.rights | Acesso Aberto | - |
Direitos: dc.rights | Copyright © 2010 Diego F. Sánchez et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Fonte: http://www.hindawi.com/journals/ijrc/2010/727909/. Acesso em: 04 mar. 2013. | - |
Palavras-chave: dc.subject | Cinemática das máquinas | - |
Palavras-chave: dc.subject | Computação - robótica | - |
Título: dc.title | A reconfigurable system approach to the direct kinematics of a 5 d.o.f robotic manipulator | - |
Tipo de arquivo: dc.type | livro digital | - |
Aparece nas coleções: | Repositório Institucional – UNB |
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