Hybrid low-dropout voltage regulator designed with TFET-MOSFET nanowire technologies

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MetadadosDescriçãoIdioma
Autor(es): dc.contributorUniversidade de São Paulo (USP)-
Autor(es): dc.contributorUniversidade Estadual Paulista (UNESP)-
Autor(es): dc.creatorTolêdo, Rodrigo do Nascimento-
Autor(es): dc.creatorMartino, Joao Antonio-
Autor(es): dc.creatorDer Agopian, Paula Ghedini-
Data de aceite: dc.date.accessioned2025-08-21T20:18:01Z-
Data de disponibilização: dc.date.available2025-08-21T20:18:01Z-
Data de envio: dc.date.issued2025-04-29-
Data de envio: dc.date.issued2023-09-01-
Fonte completa do material: dc.identifierhttp://dx.doi.org/10.1088/1361-6641/aceb84-
Fonte completa do material: dc.identifierhttps://hdl.handle.net/11449/307582-
Fonte: dc.identifier.urihttp://educapes.capes.gov.br/handle/11449/307582-
Descrição: dc.descriptionIn this work, hybrid low-dropout voltage regulators (LDO) designed with a tunnel field-effect transistor (TFET)-MOSFET nanowire (NW) technologies are presented. The devices were modeled using Verilog-A with lookup tables based on experimental data of NW-TFETs and NW-MOSFETs fabricated in the same silicon vertical process flow. In all LDOs, the amplifier devices were biased with the same gm/I D = 9.5 V−1 for a maximum load current/capacitance of 1 mA/1 nF. In the hybrid regulators, the power transistors are designed with NW-MOSFETs to deliver the high load current, while the other devices are implemented with NW-TFET to provide high gain and low power consumption. Due to different onset voltages, two hybrid LDOs are proposed, one with symmetrical onset voltages implemented with a voltage shift (Hybrid-ΔV LDO) and one with a level-shift stage using the real characteristics of the devices (Hybrid-LS LDO). The hybrid circuits were compared to LDOs designed using only NW-TFETs and with only NW-MOSFETs. The Hybrid-ΔV LDO presents the best loop gain (62 dB) with a low quiescent current (7 nA), while the Hybrid-LS LDO shows a good gain-bandwidth product (700 Hz). In the transient analysis, the hybrid circuits showed a settling time close to the NW-MOSFET LDO but with higher undershoot/overshoot values in the case of a load transient. As demonstrated, the use of hybrid projects with TFET-MOSFET NW technologies enable LDOs with ultra-low power consumption and high loop gain, that are presented on TFET circuits and with a frequency response equivalent of MOSFET circuits.-
Descrição: dc.descriptionLSI/PSI/USP University of Sao Paulo-
Descrição: dc.descriptionUNESP Sao Paulo State University-
Descrição: dc.descriptionUNESP Sao Paulo State University-
Idioma: dc.languageen-
Relação: dc.relationSemiconductor Science and Technology-
???dc.source???: dc.sourceScopus-
Palavras-chave: dc.subjectanalog circuit design-
Palavras-chave: dc.subjecthybrid TFET-MOSFET-
Palavras-chave: dc.subjectlow-dropout voltage regulator (LDO)-
Palavras-chave: dc.subjectnanowire-
Palavras-chave: dc.subjecttunnel FET (TFET)-
Título: dc.titleHybrid low-dropout voltage regulator designed with TFET-MOSFET nanowire technologies-
Tipo de arquivo: dc.typelivro digital-
Aparece nas coleções:Repositório Institucional - Unesp

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