Analysis of Low-Dropout Voltage Regulator designed with Gate-All-Around nanosheet transistors

Registro completo de metadados
MetadadosDescriçãoIdioma
Autor(es): dc.contributorUniversidade de São Paulo (USP)-
Autor(es): dc.contributorUniversidade Estadual Paulista (UNESP)-
Autor(es): dc.creatorDe Barros Souto, Rayana Carvalho-
Autor(es): dc.creatorMartino, Joao Antonio-
Autor(es): dc.creatorAgopian, Paula Ghedini Der-
Data de aceite: dc.date.accessioned2025-08-21T15:19:02Z-
Data de disponibilização: dc.date.available2025-08-21T15:19:02Z-
Data de envio: dc.date.issued2025-04-29-
Data de envio: dc.date.issued2022-12-31-
Fonte completa do material: dc.identifierhttp://dx.doi.org/10.1109/SBMicro60499.2023.10302596-
Fonte completa do material: dc.identifierhttps://hdl.handle.net/11449/306992-
Fonte: dc.identifier.urihttp://educapes.capes.gov.br/handle/11449/306992-
Descrição: dc.descriptionIn this work the Low Dropout Voltage Regulator (LDO) was designed with gate-all-around nanosheet transistors (GAA-NSH). The simulation model was developed using Verilog-A code and the Look Up Table (LUT) was based on experimental data. The gm/ID of 10.5 V-1 was used for the differential pair in the LDO circuit, resulting in a dropout voltage of 340 mV through the power output transistor. The LDO designed with NSH transistors demonstrated promising results, such as an open-loop gain of 57 dB, a gain-bandwidth product of 52 MHz, and a power rejection rate of approximately -70 dB.-
Descrição: dc.descriptionUniversity of Sao Paulo LSI/PSI/USP-
Descrição: dc.descriptionSao Paulo State University Unesp-
Descrição: dc.descriptionSao Paulo State University Unesp-
Idioma: dc.languageen-
Relação: dc.relation2023 37th Symposium on Microelectronics Technology and Devices, SBMicro 2023-
???dc.source???: dc.sourceScopus-
Palavras-chave: dc.subjectGAA-NSH-
Palavras-chave: dc.subjectLDO-
Palavras-chave: dc.subjectLDO GAA-NSH-
Palavras-chave: dc.subjectLow Dropout Voltage Regulator-
Palavras-chave: dc.subjectNanosheet device-
Título: dc.titleAnalysis of Low-Dropout Voltage Regulator designed with Gate-All-Around nanosheet transistors-
Tipo de arquivo: dc.typeaula digital-
Aparece nas coleções:Repositório Institucional - Unesp

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