On the impact of mode transition on phased transactional memory performance

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MetadadosDescriçãoIdioma
Autor(es): dc.contributorUniversidade Estadual de Campinas (UNICAMP)-
Autor(es): dc.contributorUniversidade Estadual Paulista (UNESP)-
Autor(es): dc.contributorUniversity of Alberta-
Autor(es): dc.creatorMunoz Morales, Catalina-
Autor(es): dc.creatorHonorio, Bruno-
Autor(es): dc.creatorde Carvalho, Joao P.L.-
Autor(es): dc.creatorBaldassin, Alexandro-
Autor(es): dc.creatorAraujo, Guido-
Data de aceite: dc.date.accessioned2025-08-21T16:42:53Z-
Data de disponibilização: dc.date.available2025-08-21T16:42:53Z-
Data de envio: dc.date.issued2023-07-29-
Data de envio: dc.date.issued2023-07-29-
Data de envio: dc.date.issued2023-03-01-
Fonte completa do material: dc.identifierhttp://dx.doi.org/10.1016/j.jpdc.2022.11.009-
Fonte completa do material: dc.identifierhttp://hdl.handle.net/11449/248135-
Fonte: dc.identifier.urihttp://educapes.capes.gov.br/handle/11449/248135-
Descrição: dc.descriptionSeveral transactional memory implementations that employ state-of-the-art software and hardware techniques to deliver performance have been investigated in the last decade. Phased-based Transactional Memory (PhTM) systems run transactions in phases, such that all transactions in a phase execute in the same (hardware/software) mode. In PhTM, a runtime monitors the execution and decides when to change all transactions to another execution mode. Identifying the right moment to perform a mode transition is a central problem to achieve performance in PhTM systems. This article analyzes PhTM and provides a characterization of mode transitions and their impact on performance. We consider three PhTM implementations: (i) PhTM*, the first phased-based TM designed; (ii) Commit Throughput Measurement (CTM), a general-purpose runtime; and (iii) GoTM, a Graph-oriented runtime. We conduct a performance analysis to identify the drawbacks and benefits of each PhTM implementation with respect to their associated parameters. Results with speedups of up to 10× over the sequential baseline for CTM show that this mechanism generally shows better performance for a diverse set of applications.-
Descrição: dc.descriptionFundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)-
Descrição: dc.descriptionUniversity of Campinas (UNICAMP) Institute of Computing, Av. Albert Einstein, 1251 Cidade Universitária, Sao Paulo-
Descrição: dc.descriptionUniv. Estadual Paulista (UNESP) DEMAC, Avenida 24 A, 1515, Sao Paulo-
Descrição: dc.descriptionUniversity of Alberta Department of Computing Science, 2-32 Athabasca Hall-
Descrição: dc.descriptionUniv. Estadual Paulista (UNESP) DEMAC, Avenida 24 A, 1515, Sao Paulo-
Descrição: dc.descriptionFAPESP: 2017/15236-0-
Descrição: dc.descriptionFAPESP: 2019/04536-9-
Formato: dc.format126-139-
Idioma: dc.languageen-
Relação: dc.relationJournal of Parallel and Distributed Computing-
???dc.source???: dc.sourceScopus-
Palavras-chave: dc.subjectHardware transactional memory-
Palavras-chave: dc.subjectSoftware transactional memory-
Título: dc.titleOn the impact of mode transition on phased transactional memory performance-
Tipo de arquivo: dc.typelivro digital-
Aparece nas coleções:Repositório Institucional - Unesp

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