Performance Perspective of Gate-All-Around Double Nanosheet CMOS Beyond High-Speed Logic Applications

Registro completo de metadados
MetadadosDescriçãoIdioma
Autor(es): dc.contributorGhent University-
Autor(es): dc.contributorUniversidade Estadual Paulista (UNESP)-
Autor(es): dc.contributorUniversidade de São Paulo (USP)-
Autor(es): dc.contributorFederal Technological University of Parana-
Autor(es): dc.contributorGREYC-
Autor(es): dc.contributorImec-
Autor(es): dc.creatorSimoen, Eddy-
Autor(es): dc.creatorCoelho, Carlos H. S.-
Autor(es): dc.creatorda Silva, Vanessa C. P.-
Autor(es): dc.creatorMartino, Joao A.-
Autor(es): dc.creatorAgopian, Paula G. D.-
Autor(es): dc.creatorOliveira, Alberto-
Autor(es): dc.creatorCretu, Bogdan-
Autor(es): dc.creatorVeloso, Anabela-
Data de aceite: dc.date.accessioned2025-08-21T18:14:15Z-
Data de disponibilização: dc.date.available2025-08-21T18:14:15Z-
Data de envio: dc.date.issued2023-07-29-
Data de envio: dc.date.issued2023-07-29-
Data de envio: dc.date.issued2022-10-18-
Fonte completa do material: dc.identifierhttp://dx.doi.org/10.29292/jics.v17i2.617-
Fonte completa do material: dc.identifierhttp://hdl.handle.net/11449/246571-
Fonte: dc.identifier.urihttp://educapes.capes.gov.br/handle/11449/246571-
Descrição: dc.descriptionIn this review paper, the performance characteristics of Gate-All-Around (GAA) double nanosheet (NS) MOSFETs are described over a broad temperature range, from 78 K to 473 K (200oC). Emphasis is on the analog operation, showing good potential. Besides the transistor length, the impact of the metal gate Effective Work Function and the vertical distance between the nanosheets has been studied. Among oth-ers, a clear Zero Temperature Coefficient (ZTC) gate voltage has been observed that can be modeled by considering the shift with temperature of the threshold voltage and the maximum transconductance. A trade-off has been noticed between the transistor efficiency and the unit gain frequency, whereby the optimal operation point occurs in strong inversion regime. The feasibility of designing simple analog circuits has also been demonstrated. Finally, a detailed investigation of the low-fre-quency noise behavior yields good values for the flicker noise Power Spectral Density in comparison with other technology nodes.-
Descrição: dc.descriptionDepart Solid State Sciences Ghent University-
Descrição: dc.descriptionUNESP Sao Paulo State University-
Descrição: dc.descriptionLSI/PSI/USP University of Sao Paulo-
Descrição: dc.descriptionUTFPR Federal Technological University of Parana-
Descrição: dc.descriptionUNICAEN ENSICAEN CNRS GREYC-
Descrição: dc.descriptionUPM Imec-
Descrição: dc.descriptionUNESP Sao Paulo State University-
Idioma: dc.languageen-
Relação: dc.relationJournal of Integrated Circuits and Systems-
???dc.source???: dc.sourceScopus-
Palavras-chave: dc.subjectanalog performance-
Palavras-chave: dc.subjectcryogenic temperatures-
Palavras-chave: dc.subjectGAA CMOS-
Palavras-chave: dc.subjectlow-frequency noise-
Título: dc.titlePerformance Perspective of Gate-All-Around Double Nanosheet CMOS Beyond High-Speed Logic Applications-
Tipo de arquivo: dc.typelivro digital-
Aparece nas coleções:Repositório Institucional - Unesp

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