Nanowire TFET with different Source Compositions applied to Low-Dropout Voltage Regulator

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MetadadosDescriçãoIdioma
Autor(es): dc.contributorUniversidade de São Paulo (USP)-
Autor(es): dc.contributorUniversidade Estadual Paulista (UNESP)-
Autor(es): dc.creatorDo Nascimento Tolêdo, Rodrigo-
Autor(es): dc.creatorMartino, Joao Antonio-
Autor(es): dc.creatorDer Agopian, Paula Ghedini-
Data de aceite: dc.date.accessioned2025-08-21T15:56:35Z-
Data de disponibilização: dc.date.available2025-08-21T15:56:35Z-
Data de envio: dc.date.issued2023-07-29-
Data de envio: dc.date.issued2023-07-29-
Data de envio: dc.date.issued2021-12-31-
Fonte completa do material: dc.identifierhttp://dx.doi.org/10.1109/SBMICRO55822.2022.9881035-
Fonte completa do material: dc.identifierhttp://hdl.handle.net/11449/246002-
Fonte: dc.identifier.urihttp://educapes.capes.gov.br/handle/11449/246002-
Descrição: dc.descriptionThis work presents the analysis of vertical nanowire tunnel field-effect transistors (TFETs) and vertical nanowire MOSFET applied to low-dropout voltage regulator (LDO) design. Three TFETs with sources composed by Si, SiGe an Ge are analyzed. The transistor model is based on lookup tables (LUTs) and are implemented in Verilog-A. In all LDO designs, it was defined a gm/ID of 8 V-1 for the differential amplifier transistors, the load current of 1 μ A and capacitance of 10-pF. A much higher equivalent width was needed for the Si-TFET LDO power transistor which degraded its frequency response, but it consumes an ultra-low quiescent current (300 pA). All TFET based LDOs were stable without the need of a compensator capacitor, while for the MOSFET LDO, a 5-pF capacitor was necessary. The SiGe-TFET LDO presented the higher loop gain (60 dB) which resulted in the best load regulation (0.25mV/μA). The MOSFET LDO presented low efficiency due to high quiescent current, but presented the second-best gain-bandwidth product (GBW) of 52.5 KHz and PSR at low frequency (-49.4 dB). The Ge-TFET LDO presented the best overall results, with the best GBW (70 KHz) and PSR (-52 dB at low frequencies) dissipating only 42.9 nA.-
Descrição: dc.descriptionLSI/PSI/USP University of Sao Paulo-
Descrição: dc.descriptionUNESP Sao Paulo State University-
Descrição: dc.descriptionUNESP Sao Paulo State University-
Idioma: dc.languageen-
Relação: dc.relation36th Symposium on Microelectronics Technology, SBMICRO 2022 - Proceedings-
???dc.source???: dc.sourceScopus-
Palavras-chave: dc.subjectanalog circuit design-
Palavras-chave: dc.subjectlow-dropout voltage regulators-
Palavras-chave: dc.subjectLUT-
Palavras-chave: dc.subjectnanowire transistors-
Palavras-chave: dc.subjectTFET-
Título: dc.titleNanowire TFET with different Source Compositions applied to Low-Dropout Voltage Regulator-
Tipo de arquivo: dc.typeaula digital-
Aparece nas coleções:Repositório Institucional - Unesp

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