Experimental Analysis of Trade-Off Between Transistor Efficiency and Unit Gain Frequency of Nanosheet NMOSFET down to-100oC

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MetadadosDescriçãoIdioma
Autor(es): dc.contributorUniversidade de São Paulo (USP)-
Autor(es): dc.contributorimec-
Autor(es): dc.contributorUniversidade Estadual Paulista (UNESP)-
Autor(es): dc.creatorSilva, Vanessa C. P.-
Autor(es): dc.creatorLeal, Joao V. C.-
Autor(es): dc.creatorPerina, Welder F.-
Autor(es): dc.creatorMartino, Joao A.-
Autor(es): dc.creatorSimoen, E.-
Autor(es): dc.creatorVeloso, A.-
Autor(es): dc.creatorAgopian, Paula G. D.-
Data de aceite: dc.date.accessioned2025-08-21T16:16:34Z-
Data de disponibilização: dc.date.available2025-08-21T16:16:34Z-
Data de envio: dc.date.issued2023-03-01-
Data de envio: dc.date.issued2023-03-01-
Data de envio: dc.date.issued2022-05-23-
Fonte completa do material: dc.identifierhttp://dx.doi.org/10.29292/jics.v17i1.550-
Fonte completa do material: dc.identifierhttp://hdl.handle.net/11449/240261-
Fonte: dc.identifier.urihttp://educapes.capes.gov.br/handle/11449/240261-
Descrição: dc.descriptionThis work presents a trade-off analysis between transistor efficiency (gm/ID which is proportional to the intrinsic voltage gain Av) and the unit gain frequency (fT) of nanosheet (NSH) NMOS devices for temperatures from room temperature down to-100 °C. The analyses were performed experimentally as a function of the inversion coefficient (IC) in order to determine the optimal application region for optimization of both parameters. These analyses were performed with NSH NMOS for channel lengths of 28 nm, 70 nm and 200 nm. It was observed that the optimal operation point takes place in the transition between moderate and strong inversion (IC=10) for the three analyzed temperatures, where the highest value obtained for gm/ID x fT was found. In this optimum bias point the AV is 45 dB (L=200 nm) and 39 dB (L=28 nm) and fT is 9 GHz (L=200 nm) and 186 GHz (L=28nm) both for T=25 °C, which should be suitable for many applications.-
Descrição: dc.descriptionCoordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)-
Descrição: dc.descriptionConselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)-
Descrição: dc.descriptionLSI/PSI/USP University of Sao Paulo-
Descrição: dc.descriptionimec-
Descrição: dc.descriptionUNESP Sao Paulo State University-
Descrição: dc.descriptionUNESP Sao Paulo State University-
Idioma: dc.languageen-
Relação: dc.relationJournal of Integrated Circuits and Systems-
???dc.source???: dc.sourceScopus-
Palavras-chave: dc.subjectanalog parameters-
Palavras-chave: dc.subjectinversion coefficient-
Palavras-chave: dc.subjectlow temperature-
Palavras-chave: dc.subjectNanosheet transistors-
Título: dc.titleExperimental Analysis of Trade-Off Between Transistor Efficiency and Unit Gain Frequency of Nanosheet NMOSFET down to-100oC-
Tipo de arquivo: dc.typelivro digital-
Aparece nas coleções:Repositório Institucional - Unesp

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