Optimization of the Dual-Technology Back-Enhanced Field Effect Transistor

Registro completo de metadados
MetadadosDescriçãoIdioma
Autor(es): dc.contributorUniversidade de São Paulo (USP)-
Autor(es): dc.contributorUniversidade Estadual Paulista (Unesp)-
Autor(es): dc.creatorMori, C. A.B.-
Autor(es): dc.creatorAgopian, P. G.D. [UNESP]-
Autor(es): dc.creatorMartino, J. A.-
Data de aceite: dc.date.accessioned2022-02-22T00:46:09Z-
Data de disponibilização: dc.date.available2022-02-22T00:46:09Z-
Data de envio: dc.date.issued2021-06-25-
Data de envio: dc.date.issued2021-06-25-
Data de envio: dc.date.issued2020-09-01-
Fonte completa do material: dc.identifierhttp://dx.doi.org/10.1109/EUROSOI-ULIS49407.2020.9365305-
Fonte completa do material: dc.identifierhttp://hdl.handle.net/11449/206091-
Fonte: dc.identifier.urihttp://educapes.capes.gov.br/handle/11449/206091-
Descrição: dc.descriptionIn this paper we optimize the Dual-Technology Back-Enhanced SOI (DT BESOI) FETs varying the thickness of gate oxide, silicon film and buried oxide focusing on transfer characteristics. The DT BESOI optimization takes into account its behavior as both nMOS and pTunnel-FET device, which are obtained through the variation of positive and negative back biases. In the studied range, the optimized results were tox=lnm, tsi = 10nm and tBOX = 20nm. These DT BESOI results are compared with the conventional nMOS and pTFET devices.-
Descrição: dc.descriptionLSI/PSI/USP University of Sao Paulo-
Descrição: dc.descriptionUNESP Sao Paulo State University-
Descrição: dc.descriptionUNESP Sao Paulo State University-
Idioma: dc.languageen-
Relação: dc.relation2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2020-
???dc.source???: dc.sourceScopus-
Palavras-chave: dc.subjectDual-Technology (DT)-
Palavras-chave: dc.subjectSilicon-On-Insulator (SOI)-
Palavras-chave: dc.subjectTunnel Field Effect Transistor (TFET)-
Palavras-chave: dc.subjectUltra-Thin Body and Buried oxide (UTBB)-
Título: dc.titleOptimization of the Dual-Technology Back-Enhanced Field Effect Transistor-
Aparece nas coleções:Repositório Institucional - Unesp

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