FPGA hardware linear regression implementation using fixed-point arithmetic

Registro completo de metadados
MetadadosDescriçãoIdioma
Autor(es): dc.contributorUniversidade Estadual Paulista (Unesp)-
Autor(es): dc.contributorUniversity of Limerick-
Autor(es): dc.creatorDe Assis Pedrobon Ferreira, Willian [UNESP]-
Autor(es): dc.creatorGrout, Ian-
Autor(es): dc.creatorDa Silva, Alexandre César Rodrigues [UNESP]-
Data de aceite: dc.date.accessioned2022-02-22T00:23:16Z-
Data de disponibilização: dc.date.available2022-02-22T00:23:16Z-
Data de envio: dc.date.issued2020-12-11-
Data de envio: dc.date.issued2020-12-11-
Data de envio: dc.date.issued2019-08-26-
Fonte completa do material: dc.identifierhttp://dx.doi.org/10.1145/3338852.3339853-
Fonte completa do material: dc.identifierhttp://hdl.handle.net/11449/198009-
Fonte: dc.identifier.urihttp://educapes.capes.gov.br/handle/11449/198009-
Descrição: dc.descriptionIn this paper, a hardware design based on the field programmable gate array (FPGA) to implement a linear regression algorithm is presented. The arithmetic operations were optimized by applying a fixed-point number representation for all hardware based computations. A floating-point number training data point was initially created and stored in a personal computer (PC) which was then converted to fixed-point representation and transmitted to the FPGA via a serial communication link. With the proposed VHDL design description synthesized and implemented within the FPGA, the custom hardware architecture performs the linear regression algorithm based on matrix algebra considering a fixed size training data point set. To validate the hardware fixed-point arithmetic operations, the same algorithm was implemented in the Python language and the results of the two computation approaches were compared. The power consumption of the proposed embedded FPGA system was estimated to be 136.82 mW.-
Descrição: dc.descriptionScholl of Engineering São Paulo State University (UNESP)-
Descrição: dc.descriptionDepartment of Electronic and Computer Engineering University of Limerick-
Descrição: dc.descriptionScholl of Engineering São Paulo State University (UNESP)-
Idioma: dc.languageen-
Relação: dc.relationProceedings - 32nd Symposium on Integrated Circuits and Systems Design, SBCCI 2019-
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Palavras-chave: dc.subjectFixed-point arithmetic-
Palavras-chave: dc.subjectFPGA-
Palavras-chave: dc.subjectHardware-
Palavras-chave: dc.subjectLinear regression-
Palavras-chave: dc.subjectMachine learning-
Título: dc.titleFPGA hardware linear regression implementation using fixed-point arithmetic-
Aparece nas coleções:Repositório Institucional - Unesp

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